diff --git a/src/finn/custom_op/fpgadataflow/templates.py b/src/finn/custom_op/fpgadataflow/templates.py
index d33a7b54b8e96c5e63aa8b77743e83e7460715a6..975da7b6d2a85bd58879a92ac5a8dc1efb4dabe6 100644
--- a/src/finn/custom_op/fpgadataflow/templates.py
+++ b/src/finn/custom_op/fpgadataflow/templates.py
@@ -86,15 +86,17 @@ puts "HLS project: $config_proj_name"
 set config_hwsrcdir "$HWSRCDIR$"
 puts "HW source dir: $config_hwsrcdir"
 set config_proj_part "$FPGAPART$"
-set config_bnnlibdir "$::env(FINN_ROOT)/finn-hlslib"
+set config_bnnlibdir "$::env(FINN_ROOT)/deps/finn-hlslib"
 puts "finn-hlslib dir: $config_bnnlibdir"
-set config_customhlsdir "$::env(FINN_ROOT)/finn/custom_hls"
+set config_customhlsdir "$::env(FINN_ROOT)/custom_hls"
 puts "custom HLS dir: $config_customhlsdir"
+set config_customrtldir "$::env(FINN_ROOT)/finn-rtllib/checksum"
+puts "custom RTL dir: $config_customrtldir"
 set config_toplevelfxn "$TOPFXN$"
 set config_clkperiod $CLKPERIOD$
 
 open_project $config_proj_name
-add_files $config_hwsrcdir/top_$TOPFXN$.cpp -cflags "-std=c++14 -I$config_bnnlibdir -I$config_customhlsdir"
+add_files $config_hwsrcdir/top_$TOPFXN$.cpp -cflags "-std=c++14 -I$config_bnnlibdir -I$config_customhlsdir -I$config_customrtldir"
 
 set_top $config_toplevelfxn
 open_solution sol1