diff --git a/src/finn/transformation/fpgadataflow/insert_fifo.py b/src/finn/transformation/fpgadataflow/insert_fifo.py index 85a2d47be0599a852b223f1a65d3ec04efe9bda7..6f7fde0c4faba09e584eb578819f44c18639bc9d 100644 --- a/src/finn/transformation/fpgadataflow/insert_fifo.py +++ b/src/finn/transformation/fpgadataflow/insert_fifo.py @@ -159,7 +159,7 @@ class InsertFIFO(Transformation): # insert FIFO as last node, except when last node is DMA if ( graph.node[-1].op_type != "StreamingFIFO" - and graph.node[0].op_type != "IODMA" + and graph.node[-1].op_type != "IODMA" ): n = graph.node[-1] assert ( diff --git a/src/finn/transformation/fpgadataflow/insert_iodma.py b/src/finn/transformation/fpgadataflow/insert_iodma.py index 0cd7c0d4d41accf8cdba8adfaf4dbb00fc0cab7a..72e5ec4fdd721ecf549adaf7ddd38db4636bce27 100644 --- a/src/finn/transformation/fpgadataflow/insert_iodma.py +++ b/src/finn/transformation/fpgadataflow/insert_iodma.py @@ -81,8 +81,8 @@ class InsertIODMA(Transformation): # check if tensor is NHWC assert ( model.get_tensor_layout(graph_out_name) == DataLayout.NHWC - or model.get_tensor_layout(graph_in_name) == DataLayout.NC - ), "Data layout of tensors must be NHWC or NC" + or model.get_tensor_layout(graph_out_name) == DataLayout.NC + ), "Data layout of output tensor must be NHWC or NC" out_shape = model.get_tensor_shape(graph_out_name) out_dtype = model.get_tensor_datatype(graph_out_name) # determine the feasible interface width @@ -120,7 +120,7 @@ class InsertIODMA(Transformation): assert ( model.get_tensor_layout(graph_in_name) == DataLayout.NHWC or model.get_tensor_layout(graph_in_name) == DataLayout.NC - ), "Data layout of tensors must be NHWC or NC" + ), "Data layout of input tensor must be NHWC or NC" in_shape = model.get_tensor_shape(graph_in_name) in_dtype = model.get_tensor_datatype(graph_in_name) # determine the feasible interface width