Commit b0537fe7 authored by Vladimir Marchenko's avatar Vladimir Marchenko
Browse files

Typo fixes and sync with FuSa RTS changes.

parent 91cf1133
/** \page coreMISRA_Exceptions_pg MISRA-C Deviations
CMSIS-Core (Cortex-M) uses the common coding rules for CMSIS components that are documented under
<a href="../../General/html/index.html"><b>Introduction</b></a>.
\ifnot FuSaRTS <a href="../../General/html/index.html"><b>Introduction</b></a> \endif \if FuSaRTS <a href="../../Safety/html/index.html#CodingRules"><b>Coding Rules</b></a> \endif.
*/
/* MISRA-C:2004 no longer included in build
......
......@@ -8,8 +8,10 @@ The section below describes the naming conventions, requirements, and optional f
Most of the rules also apply to the core peripherals. The \ref device_h_pg contains typically these definition and also includes
the core specific header files.
\ifnot FuSaRTS
The definitions for \ref peripheral_gr can be generated using the <a href="../../SVD/html/index.html"><b>CMSIS-SVD</b></a> System View Description for Peripherals.
Refer to <a href="../../SVD/html/svd_SVDConv_pg.html"><b>SVDConv.exe</b></a> for more information.
\endif
Each peripheral provides a data type definition with a name that is composed of:
- an optional prefix <b>&lt;<i>device abbreviation&gt;</i>_</b>
......
......@@ -116,7 +116,9 @@ The following sections provide further details:
- \subpage cre_rtx_proj explains how to setup an RTX v5 project in Keil MDK.
- \subpage theory_of_operation provides general information about the operation of CMSIS-RTOS RTX v5.
- \subpage config_rtx5 describes configuration parameters of CMSIS-RTOS RTX v5.
\ifnot FuSaRTS
- \subpage creating_RTX5_LIB explains how to build your own CMSIS-RTOS RTX v5 library.
\endif
- \subpage technicalData5 lists hardware, software, and resource requirements, supplied files, and supported tool chains.
- \subpage misraCompliance5 describes the violations to the MISRA standard.
*/
......@@ -145,7 +147,7 @@ The steps to create a microcontroller application using RTX5 are:
\image html project_window.png
- If using the Variant: \b Source as statet above, you have to assure to use at least C99 compiler mode (Project Options -> C/C++ -> C99 Mode).
- If using the Variant: \b Source as stated above, you have to assure to use at least C99 compiler mode (Project Options -> C/C++ -> C99 Mode).
- You can add template files to the project by right-clicking on <b>Source Group 1</b> and selecting
<b>Add New Item to 'Source Group 1'</b>. In the new window, click on <b>User Code Template</b>. On the right-hand side
you will see all available template files for CMSIS-RTOS RTX:
......@@ -211,15 +213,18 @@ If you require some of the \ref rtx5_specific "RTX specific functions" in your a
\section cre_rtx_proj_er Add Event Recorder Visibility
\ifnot FuSaRTS
RTX5 interfaces to the <a href="http://www.keil.com/pack/doc/compiler/EventRecorder/html/index.html" target="_blank"><b>Event Recorder</b></a>
to provide event information which helps you to understand and analyze the operation.
- To use the Event Recorder together with RTX5, select the software component <b>Compiler:Event Recorder</b>.
- Select the \b Source variant of the software component <b>CMSIS:RTOS2 (API):Keil RTX5</b>.
\image html event_recorder_rte.png "Component selection for Event Recorder"
- Enable the related settings under \ref evtrecConfig.
- Build the application code and download it to the debug hardware.
\endif
Once the target application generates event information, it can be viewed in the µVision debugger using the \b Event \b Recorder.
*/
......@@ -485,7 +490,7 @@ RTX uses the generic \ref CMSIS_RTOS_TickAPI to configure and control its period
To use an alternative timer as the Kernel Tick Timer one simply needs to implement a custom version
of the \ref CMSIS_RTOS_TickAPI.
\note The OS Tick implementation provided must asure that the used timer interrupt uses the same (low) priority group
\note The OS Tick implementation provided must assure that the used timer interrupt uses the same (low) priority group
as the service interrupts, i.e. interrupts used by RTX must not preempt each other. Refer to the \ref Scheduler section
for more details.
......@@ -1097,6 +1102,7 @@ to the <b>RTX_Config.h</b> file:
/* ========================================================================================================================== */
/**
\ifnot FuSaRTS
\page creating_RTX5_LIB Building the RTX5 Library
The CMSIS Pack contains a µVision project for building the complete set of RTX5 libraries. This project can also be used as
......@@ -1111,6 +1117,7 @@ a reference for building the RTX5 libraries using a tool-chain of your choice.
-# Build the library of your choice using \b Project - \b Build \b Target (or press F7).
\image html own_lib_projwin.png "Project with files for Armv8-M Mainline"
\endif
*/
......@@ -1125,9 +1132,7 @@ The following section contains technical information about RTX v5.
- \subpage pStackRequirements lists the memory requirements for the main stack when running the RTX v5 kernel.
- \subpage pControlBlockSizes provides memory size information for \ref StaticObjectMemory "object-specific control block memory allocation".
- \subpage pDirectory_Files is an overview of the supplied files that belong to RTX v5
\ifnot FuSaRTS
- \subpage pToolchains details about the compiler support which includes ArmCC (MDK, DS-5), IAR EW-ARM, and GCC.
\endif
- \subpage pToolchains details about the compiler support \ifnot FuSaRTS which includes ArmCC (MDK, DS-5), IAR EW-ARM, and GCC. \endif
\page pHardwareRequirements Hardware Requirements
......@@ -1233,6 +1238,7 @@ might be allocated by the 'main' function of the embedded application. The follo
The stack requirements depend on the compiler and the optimization level. RTX v5 supports event annotations and this configuration impacts also the stack requirement.
\ifnot FuSaRTS
<b>Arm Compiler ARMCC V6.10</b>: Main Stack requirements for PendSV/SysTick/SVC
Optimization | RTX Kernel | RTX Kernel + Event Recorder
......@@ -1250,6 +1256,7 @@ Optimization | RTX Kernel | RTX Kernel + Event Recorder
-O2 | 112 bytes | 256 bytes
-O3 | 112 bytes | 248 bytes
\endif
\page pControlBlockSizes Control Block Sizes
......@@ -1298,10 +1305,12 @@ The CMSIS-RTOS RTX v5 is delivered in source code and several examples are provi
<td>Source</td>
<td>Generic <b>OS tick</b> implementations for various processors based on \ref rtos_os_tick_api.</td>
</tr>
\ifnot FuSaRTS
<tr>
<td>Template</td>
<td><a class="el" href="../../RTOS/html/index.html">CMSIS-RTOS API v1</a> template source and header file.</td>
</tr>
\endif
<tr>
<td>RTX</td>
<td>Directory with RTX specific files and folders. Also contains the component viewer description file.</td>
......@@ -1310,14 +1319,17 @@ The CMSIS-RTOS RTX v5 is delivered in source code and several examples are provi
<td>RTX/Config</td>
<td>CMSIS-RTOS RTX configuration files %RTX_Config.h and %RTX_Config.c.</td>
</tr>
\ifnot FuSaRTS
<tr>
<td>RTX/Examples</td>
<td>Example projects that can be directly used in development tools.</td>
</tr>
\endif
<tr>
<td>RTX/Include</td>
<td>RTX v5 specific include files.</td>
</tr>
\ifnot FuSaRTS
<tr>
<td>RTX/Include1</td>
<td>CMSIS-RTOS v1 API header file.</td>
......@@ -1326,6 +1338,7 @@ The CMSIS-RTOS RTX v5 is delivered in source code and several examples are provi
<td>RTX/Library</td>
<td>Pre-built libraries (see next table for details).</td>
</tr>
\endif
<tr>
<td>RTX/Source</td>
<td>Source code that can be used with ARMCC and GCC.</td>
......@@ -1336,12 +1349,13 @@ The CMSIS-RTOS RTX v5 is delivered in source code and several examples are provi
</tr>
</table>
\ifnot FuSaRTS
\section libFiles RTX v5 Library Files
The CMSIS-RTOS RTX Library is available pre-compiled for ARMCC and GCC compilers and supports all Cortex-M
processor variants in every configuration \if ARMv8M , including Arm Cortex-M23, Cortex-M33 and Cortex-M35P\endif.
<table class="cmtable" summary="CMSIS-RTOS RTX Library Files">
\ifnot FuSaRTS <table class="cmtable" summary="CMSIS-RTOS RTX Library Files">
<tr>
<th>Library File</th>
<th>Processor Configuration</th>
......@@ -1358,7 +1372,7 @@ processor variants in every configuration \if ARMv8M , including Arm Cortex-M23
<td>Library/ARM/RTX_CM4F.lib</td>
<td>CMSIS-RTOS RTX Library for ARMCC Compiler, Cortex-M4 and M7 with FPU, little-endian.</td>
</tr>
\if ARMv8M
\if ARMv8M
<tr>
<td>Library/ARM/RTX_V8MB.lib</td>
<td>CMSIS-RTOS RTX Library for ARMCC Compiler, Armv8-M Baseline.</td>
......@@ -1425,12 +1439,19 @@ processor variants in every configuration \if ARMv8M , including Arm Cortex-M23
</tr>
\endif
</table>
\endif
\endif
*/
/**
\ifnot FuSaRTS \page pToolchains Supported Toolchains
\page pToolchains Supported Toolchains
\if FuSaRTS
FuSa RTX5 RTOS is validated using the compiler version referenced in <a href="../../Safety/html/index.html#safety_product_overview_toolchain"><b>Tested and Verified Toolchains</b></a> section for the Arm FuSa Run-time System.
\endif
\ifnot FuSaRTS
Keil RTX5 is developed and tested using the common toolchains and development environments.
......@@ -1471,7 +1492,13 @@ Active development is currently tested with:
/**
\page CodingRules Coding Rules
\ifnot FuSaRTS
CMSIS components use <a href="../../General/html/index.html#CodingRules"><b>general coding rules</b></a> across the various components.
\endif
\if FuSaRTS
FuSa RTX RTOS uses <a href="../../Safety/html/index.html#CodingRules"><b>general coding rules</b></a>.
\endif
The CMSIS-RTOS2 API is using the following <b>Namespace</b> prefixes:
- <b>os</b> for all definitions and function names.
......@@ -1519,7 +1546,7 @@ The PC-Lint configuration uses the following Options under <b>Tools - PC-Lint Se
\endcode
The C source code is annotated with PC-Lint control comments to allows MISRA deviations.
These deviations with the underlaying design decisions are described in the following.
These deviations with the underlying design decisions are described in the following.
Deviations
----------
......@@ -1843,8 +1870,8 @@ PC-lint does not process ASM input/output operand lists and therefore falsely id
\section MISRA_12 [MISRA Note 12]: Usage of exclusive access instructions
The RTX5 implementation uses the CPU instructions LDREX and STREX (when supported by the processor) to implement atomic operations.
These atomic operations eliminate the requirement for interrupt lock-outs. The atomic operations are implemented using
inline assembly.
These atomic operations eliminate the requirement for interrupt lock-outs. The atomic operations are implemented using inline assembly.
PC-lint cannot process assembler instructions including the input/output operand lists and therefore falsely identifies issues:
- Symbol not initialized
......@@ -1893,15 +1920,17 @@ The functions that call the Event Recorder are in the module \em rtx_evr.c and t
/**
\page functionOverview Function Overview
CMSIS-RTOS2 provides multiple API interfaces:
- \subpage rtos_api2 is the new C function interface that supports dynamic object creation \if ARMv8M and Armv8-M (Arm Cortex-M23,
CMSIS-RTOS2 provides following API interfaces:
- \subpage rtos_api2 is the C function interface that supports dynamic object creation \if ARMv8M and Armv8-M (Arm Cortex-M23,
Cortex-M33 and Cortex-M35P) \endif.
\ifnot FuSaRTS
- <a class="el" href="../../RTOS/html/functionOverview.html">CMSIS-RTOS C API v1</a> is a C function API that is backward
compatible with CMSIS-RTOS v1.
- \subpage rtos_apicpp is a C++ class function API (future extension).
It is possible to intermix the different API variants in the same application and even in the same C/C++ source module.
However, the functions of the <a class="el" href="../../RTOS/html/functionOverview.html">CMSIS-RTOS C API v1</a> may be deprecated in future versions of CMSIS-RTOS.
\endif
CMSIS-RTOS2 defines also a generic system timer interface that works across the supported Arm Cortex processors:
- \subpage rtos_os_tick_api is the interface to a kernel system timer.
......@@ -1958,7 +1987,7 @@ reference. Furthermore the concrete object type is verified, i.e. one cannot cal
of one object type with a reference to another object type.
All further parameter checks applied are either object and action specific or may even be implementation
specific. Thus one should always check action function return values for `osErrorParameter` to asure the
specific. Thus one should always check action function return values for `osErrorParameter` to assure the
provided arguments were accepted.
As a rule of thumb only non-blocking access function can be used from \ref CMSIS_RTOS_ISR_Calls "Interrupt Service Routines" (ISR).
......@@ -2100,9 +2129,11 @@ The following CMSIS-RTOS C API v2 functions can be called from threads and \ref
/*=======0=========1=========2=========3=========4=========5=========6=========7=========8=========9=========0=========1====*/
/**
\ifnot FuSaRTS
\page rtos_apicpp CMSIS-RTOS C++ API
A C++11/C++14 interface is planned for the future.
\endif
*/
/*=======0=========1=========2=========3=========4=========5=========6=========7=========8=========9=========0=========1====*/
......
......@@ -49,9 +49,15 @@ The following sections provide further details about CMSIS-RTOS2 and the RTX ref
- \subpage rtos_revisionHistory documents changes made in each version for CMSIS-RTOS v2 and RTX v5.
- \subpage genRTOS2IF provides an overview about the APIs available with CMSIS-RTOS v2.
- \subpage functionOverview lists the CMSIS-RTOS2 API functions and the header file %cmsis_os2.h.
\ifnot FuSaRTS
- \subpage rtosValidation describes the validation suite that is publicly available.
- \subpage os2Migration shows how to use CMSIS-RTOS2 in existing projects and lists function differences to CMSIS-RTOS v1.
\endif
- \subpage rtx5_impl provides general information about the operation and usage of RTX v5.
\if FuSaRTS
- \subpage rtx_safety provides comprehensive instructions for highly reliable applications.
\endif
<hr>
......
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